Description
In this project, students are expected to use the Xilinx ISE Design Suite (Webpack edition) to create a project and complete the following tasks.
Task 1: Inhibit gate (5 points)
Implement an inhibit gate using the source code in Table 5-13.
Note: Please do not just copy & paste the codes into your VHDL source file. The purpose is to make sure you pay attention to all the details in the code. So please type in the codes and add your own comments.
Use the test-bench program below and run simulations to validate your design.
Task 2: Prime-number detector (7 points)
Implement a prime number detector according to the source codes in Table 5-30.Note: Please do not just copy & paste the codes into your VHDL source file. The purpose is to make sure you pay attention to all the details in the code. So please type in the codes and add your own comments.
Use the test-bench program below and run simulations to validate your design.
Task 3: Excess-3 code detector (8 points)
In the homework assignment, you are asked to design an excess-3 code detector using a two-level NAND-NAND circuit (i.e. only NAND and NOT gates). Please write a VHDL program to implement the circuit using structural design. Make sure you use the entity declaration provided below. No points would be given if failed to follow it.
Use the test-bench program below and run simulations to validate your design.
