Description
Intermediate Logic Gates
Objective:
Build the rest of the logic gates described in Chapter 1 (see list below), yielding a complete basic chip-set. The only building blocks that you can use in this project are primitive Nand gates and the composite gates that you gradually built on top of them in the last homework and this homework.
| Chip | Working? | Well built? | |||
| Mux | / | 3 | / | 2 | |
| DMux | / | 3 | / | 2 | |
| Not16 | / | 6 | / | 2 | |
| And16 | / | 6 | / | 3 | |
| Or16 | / | 6 | / | 3 | |
| Mux16 | / | 6 | / | 3 | |
| Or8Way | / | 6 | / | 3 | |
| Mux4Way16 | / | 6 | / | 3 | |
| Mux8Way16 | / | 6 | / | 3 | |
| DMux4Way | / | 6 | / | 3 | |
| DMux8Way | / | 6 | / | 3 | |
| Subtotal | / | 60 | / | 30 | |
| Documentation | / | 10 | |||
See http://nand2tetris.org/01.php for some tips/resources/tools
