[SOLVED] CS2110-Timed Lab 2 Finite State Machines

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Programming resource
Digital learning resource
Category:
Practical programming resource
Suitable for guided study and reference
Tutor guidance available when needed

Description

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In this timed lab, you will be creating a one-hot finite state machine in CircuitSim. This Finite State Machine will take in one 1-bit input, and it will output three 1-bit outputs. Diagrams and detailed instructions are provided below.

1         Instructions

Please make sure you have CircuitSim 1.7.4 or CircuitSim 1.8.0 downloaded on your computer. It can be found here.

1.1        State Transition Diagram

Figure 1: Transition diagram.

1.2        Restrictions

Your main register MUST be named ”stateReg”, and the input / output pins we have given you in the skeleton file must not be renamed. Do not add any additional input / output pins other than the ones we have given you. Do not rename the sub-circuit we have given you. If you have issues, check out the ”Common Errors” section below.

If you have any questions on what you may not use then assume you can’t use it and ask a TA.

You are only allowed to use the following components in CircuitSim:

  • Basic logic gates (AND, OR, NOT)
  • Registers (for this assignment, exactly ONE)
  • Wires, splitters/joiners, tunnels, constants, plexers
Resource details

Understand the Task Before You Use the Resource

Review the requirements, identify the programming concepts involved, study the implementation and test your understanding with your own examples and modifications.