Description
You should finish all the requirements (shown below) in this homework and Project report.
Verilog and SystemVerilog generators aren’t allowed in this course.
General rules for deliverables
You need to complete this homework INDIVIDUALLY. You can discuss the homework with other students, but you need to do the homework by yourself. You should not copy anything from someone else, and you should not distribute your homework to someone else. If you violate any of these rules, you will get NEGATIVE scores, or even fail this course directly
When submitting your homework, compress all files into a single zip file, and upload the compressed file to Moodle.
Please follow the file hierarchy shown in Figure 1.
F740XXXXX ( your id ) (folder) src( folder ) * Store your source code
report.docx ( project report. The report template is already included. Follow the template to complete the report. )
Homework Description
